Field-Programmable Gate Arrays Engineer

Company Description

Chain Reaction designs and builds hardware that fuels advanced privacy technologies by accelerating compute performance. Our world-class teams are transforming the future of data, creating the infrastructure that will power the next generation of secure cloud computing. The main bottleneck in scaling cutting-edge solutions in privacy tech, data-analysis and real-time computing is acceleration – existing hardware cannot keep up with data processing needs. Chain Reaction’s products reshape how data is processed and used on a global scale, and we’re looking for the brightest people to join us.

We are looking for Emulation & Prototyping Engineer

Roles And Responsibilities

• Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
• Map RTL designs to FPGA/emulation platforms.
• Develop test environments and infrastructure for HW/SW co-verification.
• Support hardware bring-up and software validation on emulation platforms.
• Collaborate with verification engineers to run regressions and accelerate debug cycles.
• Optimize partitioning, synthesis, and runtime performance on emulation systems.
• Work cross-functionally with RTL design, verification, and firmware/software teams.

Requirements:

• BSc or MSc in Electrical Engineering or Computer Engineering.
• 4–7 years of experience in FPGA prototyping or emulation of ASIC/SoC designs
• Strong understanding of digital design and RTL (Verilog/SystemVerilog/VHDL).
• Hands-on experience with at least one emulation/prototyping platform (Palladium, Protium, Veloce, ZeBu, or FPGA-based)
• Good knowledge of synthesis, timing closure, and design partitioning for FPGA/emulation.
• Familiarity with verification methodologies and environments (UVM/SystemVerilog/C).
• Experience with scripting (TCL, Python, Perl, or Shell) for automation.
• Strong problem-solving and debugging skills.
• Ability to work in a fast-paced, collaborative environment.
• Excellent communication and teamwork skills.

Preferred

• Exposure to software bring-up, driver validation, or firmware testing on emulation.
• Knowledge of bus protocols (Ethernet, DDR, etc.).
• Experience with debug tools (waveform viewers, logic analyzers, or emulation debug frameworks).
• Background in SoC architecture and hardware/software co-design.

You can send your resume to: [email protected]