FPGA Engineer

An advanced, market-leading DefenseTech and Aerospace company pioneering cyber-based airspace defense and autonomous counter-drone (C-UAS) solutions.

The company engineers a proprietary, mission-critical platform that provides comprehensive airspace protection for strategic facilities, government entities, and critical infrastructure worldwide.

Acquired by a global corporate leader while continuing to operate as a fully autonomous, independent business unit, the company offers a rare combination of enterprise-grade financial resilience and startup agility.

Located in the Central District with convenient transit access, operating on a flexible working model.

Role Description-

• Serving as the Lead FPGA / SoC Engineer, operating as the sole FPGA technical authority within the DSP & Algorithms group, reporting directly to the Algorithms Team Lead.
• Taking end-to-end technical leadership over the architecture, RTL design, and implementation of complex FPGA/SoC architectures for multi-channel RF receivers and communication systems.
• Architecting high-throughput data paths and high-speed streaming pipelines, managing complex inter-subsystem data flows across PL/PS domains and FPGA-to-CPU interfaces.
• Designing and implementing high-speed interconnects and data transfer layers utilizing PCIe, DMA engines, and High-Speed Serial Interfaces.
• Implementing and optimizing digital signal processing (DSP) and communication algorithms directly onto hardware targets for deterministic, low-latency execution.
• Driving the full development lifecycle hands-on: from architectural specification and micro-architecture design through RTL coding, simulation, system-level verification, and lab Hardware Bring-Up.

Requirements-

• 5 years of dedicated professional hands-on experience in FPGA Design and development – Mandatory
• Deep, proven RTL development expertise in SystemVerilog or Verilog – Mandatory
• Demonstrated track record architecting and implementing high-throughput data flows, DMA controllers, PCIe protocols, and high-speed interfaces – Mandatory
• Strong, practical hands-on experience in Hardware Bring-Up, lab debugging with RF test equipment, and system integration – Mandatory
• High degree of technical autonomy, end-to-end architectural vision, and fluent communication in English (written and verbal) – Mandatory