Senior Design Engineer

Requirements:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Preferred Minimum Qualifications:
* 2-7 years of significant logic design engineering experience.
* Knowledge in digital design domain, preferably from the field of ASIC design front end activities.

* Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
* Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)

* Experience in scalable design implementation (definition and coding)

* Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
* Ability to work in a team.
* Ability to understand system wise aspects like interaction of HW with SW and FW