ASIC/FPGA Prototyping Design Engineer

Summary

Posted: Nov 12, 2023

Role Number:200520280

Come join Apple’s growing wireless silicon development team. Our Wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by an extraordinary vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and ambitious environment, collaborating with people across different functional areas, and thriving during crisis times, we encourage you to apply and join us!

Key Qualifications

Typically requires proven experience with bring up, debugging and verification on FPGA
Experience in FPGA development for wireless applications strongly preferred
Maintain common design platform for ASIC as well as FPGA, with considerations for memories, I/O Pads, gated clocks and complex generated clocks
Perform FPGA Synthesis, Place & Route, timing optimizations
Perform bring-up, debug, and validation of designs to achieve functional and performance goals
Create and execute plans to bring-up, debug, and validate designs
Thoroughly document and support each of above steps
Collaborate with cross-functional teams in order to define prototype hardware to evaluate new technologies and features

Description

As an ASIC/FPGA Prototyping Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meets the power, performance and area goals for Apple devices. You will help define the processes, methods and tools for design and implementation of large complex SoCs. You will develop and maintain methodology and flows checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the block/s. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process. As well, you will be involved in: - Creating emulation/Field Programmable Gate Array (FPGA) models from a register transfer level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools - Testing and debugging the emulation/FPGA model and collaterals - Development and implementation of automation aids, flows and scripts in support of emulation ease of use and improvement of equipment utilization - Front-end ASIC design - Computer architecture, SoC fabrics/interconnects, memory controllers, arbitration, flow control, caching, etc. - Bring-up and debug of FPGAs and silicon

Education & Experience

BSc + 3 years of relevant experience. MSc preferred.

Additional Requirements

Additional Requirements