FPGA Design Engineer

Role Overview

We are seeking an experienced Logic Designer & FPGA Team Leader to lead an FPGA engineering team responsible for developing advanced, high-performance systems in a regulated technology environment.

This is a key technical leadership role combining hands-on FPGA/RTL expertise, architecture ownership, and people management. The successful candidate will influence product design decisions, lead FPGA development activities, and ensure delivery of robust, high-quality solutions.

The role requires a strong technical leader who can manage a team of FPGA engineers while remaining hands-on with complex FPGA design, integration, and hardware debugging.

The position is based at the company’s offices in Yokneam, Israel. The role allows up to one work-from-home day per week; the remaining days are onsite.

Key Responsibilities

• Lead, mentor, and develop a team of FPGA designers.
• Define FPGA architecture and design methodologies.
• Own FPGA development activities including RTL coding, synthesis, implementation, timing closure, and integration.
• Work closely with hardware, software, systems, and verification teams.
• Drive technical solutions from architecture definition through hardware bring-up and product delivery.
• Support debugging and troubleshooting of complex FPGA and hardware issues.
• Manage engineering priorities across multiple platforms and technologies.
• Promote engineering excellence, quality, and best practices.

Required Qualifications

• B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or related field.
• 6+ years of experience in FPGA / RTL / Logic Design development.
• 2+ years of experience leading or managing engineering teams.
• Proven experience designing FPGA architectures.
• Strong programming experience in:
• Verilog
• SystemVerilog
• Experience with FPGA synthesis and implementation tools:
• Xilinx Vivado
• Intel Quartus
• Strong knowledge of:
• Static Timing Analysis (STA)
• Timing constraints (XDC/SDC)
• Clocking architectures and low-skew clock design

Hardware & System-Level Experience

• Hands-on experience with FPGA hardware bring-up and debugging using:
• Oscilloscopes
• Logic analyzers
• Protocol analyzers
• JTAG
• BERT
• Experience with high-speed interfaces such as:
• PCIe
• SerDes protocols
• Experience implementing or integrating signal-processing algorithms.
• Ability to read and understand electrical schematics.
• Basic understanding of:
• Signal Integrity (SI)
• Power Integrity (PI)
• Power and thermal considerations

Advantageous Experience

• Experience with FPGA devices such as:
• Artix-7
• Kintex UltraScale+
• Experience in medical devices, aerospace, defense, or other regulated industries.
• Experience leading multidisciplinary R&D projects.
• Familiarity with embedded systems and complex hardware platforms.

Leadership Requirements

• Ability to build, mentor, and grow an FPGA engineering team.
• Strong technical leadership and ownership mindset.
• Ability to manage cross-platform development activities.
• Excellent communication and collaboration skills.
• Strong analytical and problem-solving abilities.
• Commitment to quality-driven engineering processes.