Senior Hardware Engineer

Job Description

Who We Are?

Ceragon is the global innovator and leading solutions provider of end-to-end wireless connectivity, specializing in transport, access, and AI-powered managed & professional services. Through our commitment to excellence, we empower customers to elevate operational efficiency and enrich the quality of experience for their end users.

Our customers include service providers, utilities, public safety organizations, government agencies, energy companies, and more, who rely on our wireless expertise and cutting-edge solutions for 5G & 4G broadband wireless connectivity, mission-critical services, and an array of applications that harness our ultra-high reliability and speed. Ceragon solutions are deployed by more than 600 service providers, as well as more than 1,600 private network owners, in more than 130 countries.

Through our innovative, end-to-end solutions, covering hardware, software, and managed & professional services, we enable our customers to embrace the future of wireless technology with confidence, shaping the next generation of connectivity and service delivery.

Ceragon delivers extremely reliable, fast to deploy, high-capacity wireless solutions for a wide range of communication network use cases, optimized to lower TCO through minimal use of spectrum, power, real estate, and labor resources - driving simple, quick, and cost-effective network modernization and positioning Ceragon as a leading solutions provider for the “connectivity everywhere” era.

We are looking for Senior Hardware Engineer who can be part of the System& Platform R&D group, who is ready to take on technical leadership and help drive the development of complex, high‑performance hardware for communication and networking systems.

If you’re passionate about high‑speed digital design, enjoy mentoring engineers, and thrive in a hands‑on technical environment.

What You’ll Do

Technical Leadership & Mentoring

• Lead and guide a small team of hardware engineers.
• Provide technical direction, best practices, and design review feedback.
• Mentor junior engineers in schematic design, debugging, and lab methodologies.
  
  

• Design high-speed digital boards (SerDes, DDR, Ethernet).
• Own schematic development and closely oversee PCB layout.
• Ensure robust SI/PI performance through analysis and review.
• Lead board bring‑up, validation, troubleshooting, and optimization in the lab.
  
  

• Work closely with SW, FPGA, mechanical, and RF teams for system integration.
• Present technical insights, design updates, and project risks to management.
  
  

• 10+ years of hands‑on hardware design experience.
• Strong background in high‑speed digital design, SI/PI, and board‑level architecture.
• Proficiency in Cadence Capture & Allegro.
• Solid lab experience — debugging, measurements, and bring‑up.
• Experience with Ethernet‑based communication hardware.
• Familiarity with EMC/EMI practices and regulatory requirements.
• Experience in clocking and synchronization circuit solutions (PLL, clock trees, jitter analysis, timing architectures ,SyncE ).
• Excellent communication, leadership, and problem‑solving skills.
• Excellent command of English — written and verbal — with the ability to communicate effectively across global teams.
  
  

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• Prior experience as a technical lead, design owner, or mentor.