AI Hardware Systems Signal Integrity lead

Job Description

Intel AI team is working to create world-class AI Processors, developed from ground-up and optimized for training deep neural networks and for inference deployment in production environments. We are looking for talented engineers to join our growing team.

The Signal Integrity lead will drive the design and validation of end-to-end signal integrity of the high-speed interfaces of AI systems including, but not limited to, Silicon, PKG, socket, cables and PCBs.

Key Responsibilities

Technical Leadership:

• Run high speed signals up to 224G SI simulations including via optimizations, trace break out and link budget analysis
• Run PI simulations in time and frequency domains
• Oversee the electrical validation of high-speed interfaces such as PCIe, HBM, and SerDes.
• Develop and implement validation strategies and methodologies to ensure compliance with design specifications and industry standards.
• Perform hands-on validation tasks, including test execution, debugging, and analysis of hardware systems.
• Conduct reviews of test plans, validation reports, and technical documentation to maintain quality and consistency.
• Stay updated on emerging technologies, protocols, and best practices in electrical validation.
  
  

Management And Mentorship

• Lead, mentor, and guide the signal Integrity resources to achieve project objectives.
  
  

Collaboration And Communication

• Collaborate with cross-functional teams, including design and system engineers, to resolve issues and optimize performance.
• Serve as the primary point of contact for Signal Integrity matters with stakeholders and management.
  
  

Qualifications

Education:

• Bachelor’s or Master’s degree in Electrical Engineering.
  
  

Experience

• + 10 years of experience in Silicon, package & board level signal and power integrity simulations and layout implementations design.
• Experience with high-speed I/O architecture, design and concepts, transmitter & receiver design, and equalization schemes.
• Expert with electromagnetic tools such as Ansys SiWave HFSS and 3DLayout.
• Hands-on experience with lab equipment including VNA & TDR for correlation.
• Knowledge in PCB layout process and methodology.
  
  

Skills

• Strong understanding of high-speed signalling and validation techniques.
• Proficiency in using simulation and analysis tools
• Strong organizational, communication, and leadership abilities.
  
  

Work Environment

• Combination of hands-on lab work and office-based tasks.
• Occasional travel may be required for collaboration with teams or vendors.
  
  

Primary Location:

• Caesarea
  
  

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.