Sr. SI/PI and Packaging Engineer

We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging)

דרישות:

Basic Qualifications
- BSc or MSc in Electrical Engineering or in related field.
- At least 8 years of experience in a similar role.
- Experience in Layout (PCB or Package), or BackEnd integration of electrical IPs.
- Familiarity with Signal and Power integrity simulation tools.

Preferred Qualifications
- Knowledge of Chip, Package and PCB co-design methodology.
- Knowledge in high-speed digital interfaces such as DRAM/PCIe/SerDes.
- Knowledge in power-integrity and power-delivery of low-voltage high-current
- Hands on experience with lab testing and characterization.
- Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice). המשרה מיועדת לנשים ולגברים כאחד.