Yield Modelling Engineer

Job Description

Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany.

As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward.

Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.

This job requisition is to seek Yield Modelling team engineering roles in FSM HVM Global Yield organization, reporting to Yield modelling team manager.

Selected candidates will work with other members in Global Yield org including Process Integration, Device and Defect engineering teams, fab module/yield teams and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.

Yield Modelling Engineers' Responsibilities Include (but Not Limited To)

• Develop, maintain and update yield model to predict production line yield accurately in early stage of Si progression and deliver proposals to benefit production yield.
• Develop new yield modelling methods and algorithms to deliver world class yield predictability and machine-learning solutions in high-volume manufacturing environment.
• Collaborate with Data Science team to incorporate large-volume yield, defect, parametric and manufacturing data into yield modelling.
• Track inline process and non-process changes to incorporate the changepoints into yield prediction model.
• Develop yield models to identify potential parametric and defective loss components and support Process Integration, Device and Module teams to develop projects to eliminate systematic yield losses.
• Collaborate with Process Integration, Device Integration and Defect team members to explore novel yield enhancement approaches and opportunities in high-volume manufacturing environment. Engineering support for technical interactions with internal and external customers.
  
  

Candidate Should Possess The Following Behavioral Skills

Problem-solving technique with strong self-initiative and self-learning capabilities.

Ability to work with multi-functional, multi-cultural teams.

Must demonstrate solid communication skills.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Bachelor's degree in science and engineering major.

3+ years' experience in advanced node semiconductor industry in data science and analysis / modelling.

3+ years' experience in Python and other program languages to develop a new analysis method and algorithms using large amount of fab data. Expertise in big data analysis and machine-learning.

3+ years' experience with exploreing and identify product-specific yield/performance correlation from large amount of multi-level, unstructured fab data.

3+ years' experience in Device Physics and overall FinFET process flow.

Preferred Qualifications

Basic understanding on module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.

#MSO_SH #foundry

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.