Senior Power Integrity Engineer

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities:
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target i

דרישות:

B.Sc. or M.Sc. in Electrical Engineering.
5+ years of experience in Power Integrity, Hardware Design, or related disciplines.
Strong understanding of power delivery networks, decoupling methodologies, and target impedance concepts.
Hands-on experience with PI simulation tools such as:
Cadence Sigrity PowerSI / OptimizePI
Ansys SIwave
Ansys HFSS
PowerDC or equivalent
Experience designing high-layer-count PCBs for networking, telecom, server, or data-center products.
Knowledge of high-speed digital systems and interaction between Signal Integrity and Power Integrity.
Experience with multi-phase voltage regulators, power sequencing, and power management architectures.
Strong understanding of PCB materials, stackups, and manufacturing constraints.
Experience performing lab validation and correlation measurements.
Excellent problem-solving, communication, and teamwork skills.
Preferred Qualifications:
Experience with high-performance networking ASICs and switch silicon.
Familiarity with 11