Staff Applications Engineer - Timing Signoff & Power Integrity

Raanana, Central District, Israel

Category Engineering Hire Type Employee Job ID 19149 Date posted 10/07/2026

We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years in the trenches of chip design, where timing closure is not an academic exercise but the difference between a successful tapeout and a missed launch window. You know PrimeTime inside and out because you have used it to close real designs at 16nm and below, where every picosecond matters and every ECO needs to be surgical. When someone says "we're seeing setup violations in this corner," you already have three hypotheses forming about process variation, signal integrity, or methodology gaps.
Working with customers energizes you. Not the surface-level "let me show you a slide deck" engagement, but the deep technical partnership where you sit with their design team, understand their flow, spot the bottleneck they have been fighting for two weeks, and help them solve it. You have learned that the best solutions come from listening first, then ing your expertise to their specific context.
You do not wait for perfect data. You work with what the customer gives you, ask the clarifying questions that matter, and move toward resolution. At Synopsys, you will enable some of the most complex chip designs in the industry, and the work you do will directly determine whether those designs make it to silicon on schedule.
What You'll Be Doing

Drive adoption of PrimeTime and PrimeClosure across customer accounts in both pre-sale evaluations and post-sale deployment, working directly with design teams to integrate the tools into their flows
Run competitive benchmarks against other STA tools, documenting performance, accuracy, and capacity advantages in real customer design contexts
Deliver hands-on training sessions and technical workshops to customer engineering teams, covering timing closure methodology, ECO flows, and advanced PrimeTime features
Partner with R&D and product marketing to translate customer pain points into feature requests, providing detailed use cases and technical requirements that shape the product roadmap
Troubleshoot complex timing issues in customer designs, diagnosing problems related to timing corners, process variation, crosstalk, and signal integrity
Present technical solutions and methodology recommendations to both design engineers and engineering management, tailoring the message to each audience
Build and maintain technical relationships with key customers, becoming their trusted advisor for timing closure challenges

The Impact You Will Have

Enable successful tapeouts at advanced nodes by helping customers close timing on schedules that directly affect their product launch dates
Increase PrimeTime and PrimeClosure adoption across your customer base, growing tool usage and expanding Synopsys's footprint in critical accounts
Reduce customer time spent fighting timing issues by delivering methodology improvements and best practices that make their flows more efficient
Feed high-quality customer feedback into R&D, directly influencing which features get prioritized and how they get implemented
Strengthen Synopsys's competitive position by winning benchmarks and proving tool superiority in head-to-head evaluations
Build long-term technical partnerships with customers that lead to renewals, expansions, and references for new business
Elevate the expertise of customer teams through training and knowledge transfer, creating advocates who champion Synopsys tools internally

What You'll Need

Solid working knowledge of Static Timing Analysis and ECO closure, with the ability to explain timing concepts, constraints, and methodologies to design teams
Direct experience with at least two chip tapeouts at 16nm or below nodes, where you were responsible for timing closure or ECO implementation
Hands-on proficiency with Synopsys PrimeTime, including experience running STA, analyzing timing reports, and debugging violations
Understanding of timing corners, process variation (OCV, AOCV, POCV), and signal integrity effects like crosstalk and IR drop
Experience with ECO flows using PTECO or PrimeClosure, including gate sizing, buffer insertion, and logic restructuring
BSEE or equivalent with 5+ years of relevant experience, or MSEE with 3+ years, focused on digital design, timing analysis, or applications engineering
Familiarity with scripting in TCL or Python to automate analysis tasks and customize flows is a plus

The Team You'll Be Part Of
You will be part of the Customer Success Group, specifically supporting the applications engineering team focused on PrimeTime and PrimeClosure, the industry-leading Static Timing Analysis and ECO tools. You will work closely with customers in Israel and collaborate with R&D, product marketing, and sales teams globally to ensure customers achieve their design goals and successful tapeouts.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.