Chip Infrastructure Engineer, Google Cloud

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
Minimum qualifications:
Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience in scripting languages (e.g., Unix Shell, Python) used to build tools and flows.

Experience with software version control systems (e.g., Git, Mercurial), and concepts of branches, commits, and merges.

Experience working with cross-functional teams for quality tape-outs.

Preferred qualifications:
Experience with ASIC design, debug, and verification flows.

Experience with design verification techniques including constrained-random simulation, formal property verification, or static verification.

Experience evaluating multiple vendor solutions and driving tool decisions/design improvements.

Experience working with Register-Transfer Level (RTL) teams and design integration methodologies that improve team productivity and velocity.
About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a Chip Infrastructure Engineer, you will plan and execute work in an innovative and fast-paced environment, with a focus on infrastructure that enables design and verification teams to produce the chips that power Google's computing needs. You'll be part of the chip infrastructure team responsible for compute, storage, common chip design components, and front-end tool flows.

In this role, you will work with architects, logic designers, and verification engineers to develop flows to build and verify SoC chip designs. You’ll also work closely with software, physical design, silicon bring-up and validation teams to enable a successful software integration, implementation, silicon bringup and deliver quality silicon.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Work with partner teams to provide the compute, storage and methodology needs of the chip design, verification and physical design teams.

Collaborate with Application-Specific Integrated Circuit (ASIC) teams to implement tools and methodologies.
Design and implement CAD tools, solutions and methodologies for ASIC development.

Extend the capabilities of third-party tools through their dedicated APIs.

Provide documentation, training, and first line support to increase end user productivity.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.