ASIC Engineer III

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation.

Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive.

This position is responsible for assisting in ASIC/FPGA architecture and leading in ASIC/FPGA logic design, system simulation, and lab validation of designs. Designs are created from high level specifications that may or may not include complete details. Designs are verified through setting up a test environment, developing and debugging test cases and enhancing code coverage to further improve design robustness and quality.

This position determines methods and procedures on new assignments, and may provide guidance to other personnel. This position works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors.

Primary Responsibilities

Leads in technical design projects for new and existing products
Create complex SystemVerilog UVM verification environments. Block level and integration level.
Run simulations and debug the HDL.
HDL code development, complex logic design, partitioning, RTL code development.
Run lab debug tests to verify design on board (complete design cycle).
Help debug on real systems.
Responsible for upholding F5’s Business Code of Ethics and for promptly reporting violations of the Code or other company policies.
Performs other related duties as assigned.

The Job Description is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change.

Knowledge, Skills and Abilities

Ability to use professional concepts
Must be able to apply company policies and procedures with professional concepts to resolve complex issues in creative and effective ways
Strong knowledge of industry practices required
Strong knowledge in SystemVerilog UVM development required
Excellent verbal and written communication skills required
Duties are performed in hybrid mode, according to F5 policy.
Duties require the ability to utilize a computer, communicate over the telephone, and read printed material.
Duties may require being on call periodically or working outside normal working hours (evenings and weekends). Duties may require the ability to travel via automobile or airplane, approximately 5% of the time spent traveling.

Qualifications

BS in Electrical Engineering, Computer Engineering, or related technical field
4-5 years related work experience

#LI-SS5

#LI-Hybrid

The Job Description is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change.

Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Yello/Workday (ending with f5.com or @myworkday.com).

Equal Employment Opportunity

It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates. Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting [email protected].