PCIe Silicon Validation Engineer

NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.

At NextSilicon, everything we do is guided by three core values:

Professionalism: We get exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success; we foster a work environment where every employee feels valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.

NextSilicon is seeking a highly skilled and experienced PCIe Validation Engineer to join our Silicon and System Validation team, playing a key role in the company’s core products. This position involves building a complex validation environment from scratch for pre and post silicon, defining test plan execution and debugging failures while collaborating with cross-functional teams. In this role, you will take ownership of the validation from Emulation thru bring-up to product release in quality that meets Next silicon’s standards.

Requirements:

B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent
At least 3 years of experience in implementing PCIe initialization code and PCIe subsystem, PHYs training, and calibration software.
Experience in Physical Layer (PHY) design and debug.
Experience in HW-SW integrations.
Strong debugging skills using high-end lab equipment (Analizer, Scope, BERT)
Experience in Silicon power-on - advantage
Strong knowledge of Python, C and C++ - advantage

Responsibilities:

Develop and debug PCIe initialization and reset flows.
Develop and execute test plans for pre-silicon and post-silicon validation, including targeted tests for validating specific PCIe functionality.
Take part in Silicon bring-up and power-on stage on Silicon arrival.
Collect and analyze validation data to identify trends and root causes and to uncover opportunities for improving silicon quality, reliability and performance.
Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.