NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Own the special chiplet STA, analyze the timing results, verify correctness and provide budget for the different partitions.

Generate the timing constraints for the STA and the P&R flow.

Be exposed and work on a variety of exciting designs (including high cell count and high frequency), resolving complex timing and congestion problems.

Help to shape clock tree, and effect the work of the different teams (Front end, DFT & BE).

Daily work involves all aspect of STA & chip design: take part in SDC generation & review, actively running & analyzing STA tools, guiding the group during chip closure process, etc'.

Taking part inflows development.

Take part in ramping up new breaking technologies.

What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience

5+ years of hands-on STA experience.

Experience in Prime Time and signoff methodologies.

Deep understanding of all aspects of Physical construction and Integration.

Great teammate

NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!