עדיין מחפשים עבודה במנועי חיפוש? הגיע הזמן להשתדרג!
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
35,000-50,000 ₪
As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
As a Staff DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.
Key Responsibilities
DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support.
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards.
DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies.
Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production.
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance.
Drive test coverage and quality metrics to meet stringent manufacturing requirements.
Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR.
Participate in developing and maintaining cutting-edge DFT implementation flows.
Automate and improve methodologies using advanced scripting and tools.
As a Staff DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.
Key Responsibilities
DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support.
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards.
DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies.
Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production.
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance.
Drive test coverage and quality metrics to meet stringent manufacturing requirements.
Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR.
Participate in developing and maintaining cutting-edge DFT implementation flows.
Automate and improve methodologies using advanced scripting and tools.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering or related technical field.
8+ years of hands-on experience in DFT roles at semiconductor companies.
Deep expertise in DFT flows and architectures including JTAG/iJTAG, MBIST, Scan, and ATPG.
Proficiency with industry-standard EDA tools from Synopsys (TestMAX) or Mentor (Tessent).
Strong understanding of logic design, verification, debug, and Static Timing Analysis (STA).
Scripting proficiency in Tcl, Perl, Python, or Shell for automation and innovation.
Preferred Qualifications
Master's degree in Electrical Engineering or related field.
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink) and their specific test requirements.
Experience in chip bring-up and mass production activities.
Background in advanced process technologies (7nm and below).
Excellent communication skills with ability to work effectively in global team environments.
Basic Qualifications
Bachelor's degree in Electrical Engineering or related technical field.
8+ years of hands-on experience in DFT roles at semiconductor companies.
Deep expertise in DFT flows and architectures including JTAG/iJTAG, MBIST, Scan, and ATPG.
Proficiency with industry-standard EDA tools from Synopsys (TestMAX) or Mentor (Tessent).
Strong understanding of logic design, verification, debug, and Static Timing Analysis (STA).
Scripting proficiency in Tcl, Perl, Python, or Shell for automation and innovation.
Preferred Qualifications
Master's degree in Electrical Engineering or related field.
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink) and their specific test requirements.
Experience in chip bring-up and mass production activities.
Background in advanced process technologies (7nm and below).
Excellent communication skills with ability to work effectively in global team environments.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
