Senior Design Verification Engineer

As we expand our presence in Israel, we're seeking a talented Senior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.

As a Senior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks.
Develop and maintain System Verilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing.
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified.

Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process.
Drive designs toward 100% verification closure through comprehensive test development.
Contribute to verification methodology improvements and best practices.

Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle.
Apply analytical skills and debugging techniques to solve intricate verification challenges.
Collaborate effectively in a fast-paced, team-oriented R&D environment.