עדיין מחפשים עבודה במנועי חיפוש? הגיע הזמן להשתדרג!
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
25,000-35,000 ₪
Required DFT Engineer
Job Description
Meet the Team
We are a leading Design for Test (DFT) group, delivering End-to-End solutions for our flagship products, including Silicon One!. Our chips are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance.
Our team operates in a hybrid model, with three days a week in the office in Azrieli Tower Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation!.
Your Impact:
Expand Your Scope- we provide engineers from different backgrounds the environment to master, standardize and evolve across different features.
Lead hands-on execution from pre-silicon design to silicon bring-up and production.
Collaborate with architects and verification teams to define the DFT roadmap for our next-gen Silicon One chips.
Job Description
Meet the Team
We are a leading Design for Test (DFT) group, delivering End-to-End solutions for our flagship products, including Silicon One!. Our chips are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance.
Our team operates in a hybrid model, with three days a week in the office in Azrieli Tower Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation!.
Your Impact:
Expand Your Scope- we provide engineers from different backgrounds the environment to master, standardize and evolve across different features.
Lead hands-on execution from pre-silicon design to silicon bring-up and production.
Collaborate with architects and verification teams to define the DFT roadmap for our next-gen Silicon One chips.
Requirements:
Minimum Qualifications
B.Sc. or M.Sc. in Electrical Engineering or a related field.
3+ years of experience with one or more of these features: MBIST, SCAN , ATPG, boundary scan technologies.
Strong communication and teamwork .
Preferred Qualifications
Experience across silicon product lifecycle- pre-silicon design to silicon bring-up and production.
Demonstrated ability to contribute to DFT methodologies for high-performance, AI-driven networking silicon.
Expertise in verification methodologies (e.g., UVM, SystemVerilog)
System-level understanding of complex SoC and networking silicon.
Experience with silicon debug, yield improvement, and test quality analysis.
Minimum Qualifications
B.Sc. or M.Sc. in Electrical Engineering or a related field.
3+ years of experience with one or more of these features: MBIST, SCAN , ATPG, boundary scan technologies.
Strong communication and teamwork .
Preferred Qualifications
Experience across silicon product lifecycle- pre-silicon design to silicon bring-up and production.
Demonstrated ability to contribute to DFT methodologies for high-performance, AI-driven networking silicon.
Expertise in verification methodologies (e.g., UVM, SystemVerilog)
System-level understanding of complex SoC and networking silicon.
Experience with silicon debug, yield improvement, and test quality analysis.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
תל אביב - יפו
