עדיין מחפשים עבודה במנועי חיפוש? הגיע הזמן להשתדרג!
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
18,000-26,000 ₪
Design and development of firmware for Embedded systems.
Implement and optimize advanced algorithms onto FPGA platforms.
Develop, simulate, and TEST FPGA code primarily in VHDL, with additional use of Verilog where required.
Work within the Xilinx Vivado design environment for synthesis, implementation, and debugging.
Perform hardware testing, verification, and optimization for speed, latency, and resource utilization.
Develop supporting scripts in Python for automation, data processing, and simulation workflows.
Involved in new projects design as well as support existing products.
Collaborate with other teams to integrate best practices solutions throughout the product development lifecycle.
Participate in design reviews and share technical insights with the team.
Implement and optimize advanced algorithms onto FPGA platforms.
Develop, simulate, and TEST FPGA code primarily in VHDL, with additional use of Verilog where required.
Work within the Xilinx Vivado design environment for synthesis, implementation, and debugging.
Perform hardware testing, verification, and optimization for speed, latency, and resource utilization.
Develop supporting scripts in Python for automation, data processing, and simulation workflows.
Involved in new projects design as well as support existing products.
Collaborate with other teams to integrate best practices solutions throughout the product development lifecycle.
Participate in design reviews and share technical insights with the team.
Requirements:
B.Sc. or M.Sc. in Electrical / Electronic Engineering, Computer Engineering, or related field.
At least 3 years of experience in FPGA design, including simulation, synthesis, timing closure, and debugging.
Proven experience programming in VHDL under Vivado or similar FPGA development tools.
Proven experience in VERILOG and VHDL under QUARTUS and XILINX development tools (reading, modifying, or integrating code).
Strong understanding of digital design fundamentals: pipelining, clock domains, interfaces (AXI, SPI, etc.), and signal processing.
Familiarity with algorithm translation and fixed-point optimization.
Advantageous Skills:
o Proficiency in Python scripting for automation or algorithm modelling.
o Experience with MATLAB/Simulink for algorithm prototype development.
o Exposure to high-speed data interfaces, DSP blocks, or hardware acceleration.
B.Sc. or M.Sc. in Electrical / Electronic Engineering, Computer Engineering, or related field.
At least 3 years of experience in FPGA design, including simulation, synthesis, timing closure, and debugging.
Proven experience programming in VHDL under Vivado or similar FPGA development tools.
Proven experience in VERILOG and VHDL under QUARTUS and XILINX development tools (reading, modifying, or integrating code).
Strong understanding of digital design fundamentals: pipelining, clock domains, interfaces (AXI, SPI, etc.), and signal processing.
Familiarity with algorithm translation and fixed-point optimization.
Advantageous Skills:
o Proficiency in Python scripting for automation or algorithm modelling.
o Experience with MATLAB/Simulink for algorithm prototype development.
o Exposure to high-speed data interfaces, DSP blocks, or hardware acceleration.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
תל אביב - יפו
ערב
8 חודשים
