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מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.

חברה בתחום אינטרנט ודיגיטל

מספר מקומות

חברה בתחום אינטרנט ודיגיטל

מספר מקומות
מלאה
25,000-35,000 ₪ הערכה מבוססת AI ולא שכר שהתקבל מהמעסיק
הערכה מבוססת AI ולא שכר של המעסיק

Required Senior Digital Signal Processing Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be responsible for turning communication theory into efficient, bit-exact silicon logic. You will take high-level models and transform them into the high-speed DSP blocks that anchor our next-gen architecture.
Responsibilities
Design and implement DSP algorithms for high-speed PHYs, focusing on feed-forward equalization (FFE)/decision feedback equalization (DFE) and timing recovery loops.
Perform fixed-point analysis to minimize bit-width (area/power) while maintaining the required signal-to-noise ratio (SNR).
Develop bit-exact C++/SystemC models to verify register-transfer level (RTL) against architectural intent.

Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
8 years of experience in digital signal processing (DSP) design or high-speed digital logic design.
Experience implementing digital blocks for communication systems or physical layer (PHY) architectures (e.g., filters, interpolators, or timing recovery).
Experience in MATLAB, Python, or C++ for algorithm modeling and fixed-point analysis.
Preferred qualifications:
Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
Experience with fin field-effect transistor (FinFET) process nodes (5nm, 3nm) and timing closure at GHz frequencies.
Experience with universal verification methodology (UVM) verification environments.

This position is open to all candidates.