senior system failure analysis engineer

we are looking for a system Engineer to join our failure analysis engineering team under the system product engineering group in the company. as a system failure analysis (fa) engineer, you are responsible for the end-to-end investigation of product failures. you act as the failure analysis product owner diagnosing complex issues that span hardware, software, firmware, and mechanical boundaries of the investigation, synthesizing data from all engineering disciplines to reach a definitive root cause. while you provide the architectural oversight for the team, you remain deeply technical and active in the laboratory environment.
what youll be doing:
hands-on lab investigation: you are active in the lab environment. you perform advanced debugging, characterize system behavior, run reproductions of failures in the lab, and utilize sophisticated lab equipment to validate hypotheses, bridging the gap between high-level data and physical hardware reality.
multidisciplinary failure analysis: lead deep-dive investigations into system -level failures, understand and analyse customer usage for the product, diagnose how software execution, firmware logic, and hardware components interact to cause specific failure modes.
root cause ownership: drive the investigation lifecycle from initial symptom to final physics-of-failure or logic-error identification.
task force leadership: orchestrate and lead cross-organizational technical task forces at the company level. you align experts from hw, sw, mechanical, and npi teams to solve high-priority technical problems.
advanced data & ai integration: define and utilize sophisticated data analysis tools and ai-driven methodologies. you correlate customer failure patterns with production telemetry and rma history to identify hidden trends and systemic risks.
customer quality support: take part in the customer interface by interacting with our customer quality engineers. you provide the deep technical evidence and root-cause clarity needed for quality reports and high-level technical presentations.
strategic lab direction: define the high-level debug strategy and complex TEST plans for the lab. you guide hardware practical engineers on characterization requirements and system -level stress testing.