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מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.

חברה בתחום תקשורת וסלולר

חיפה

חברה בתחום תקשורת וסלולר

חיפה
מלאה
25,000-38,000 ₪ הערכה מבוססת AI ולא שכר שהתקבל מהמעסיק
הערכה מבוססת AI ולא שכר של המעסיק

A company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in.
Haifa is looking for skilled and motivated experienced logic design engineers to join our next generation Snapdragon projects.
With this position you'll be joining the VLSI team of the Wired Connectivity group working on cutting-edge high-speed interfaces for SOCs.
You will be working on innovative design implementing complex advanced connectivity protocols with special emphasize on low power and high performance.
Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Requirements:
Bachelor's or Masters degree in Electical Engineering.
2-7 years of significant logic design engineering experience, including micro-architecure definition from specification, RTL development and debug.
Experience in scalable design implementation (definition and coding).
Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
Ability to work in a team, 5 days a week in Haifa office.
Preferred Qualifications:
Experience in RTL implementation in IO controllers with and without SerDes PHY.
Experience in clock-domain-crossing and low power technics and methodologies.
Experience with scripting languages (e.g. Python).
Ability to understand system wise aspects like interaction of HW with SW and FW.

This position is open to all candidates.