עדיין מחפשים עבודה במנועי חיפוש? הגיע הזמן להשתדרג!
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
25,000-35,000 ₪
Define architecture and micro-architecture features, write specifications, and understand implementation tradeoffs (e.g., performance, power, frequency, etc.).
Define the CPU block level design document (e.g., interface protocol, block diagrams, transaction level flow, control registers, pipelines, etc.).
Perform RTL development process (e.g., coding and debug in Verilog, SystemVerilog, or VHDL), function/performance simulation debug, and Lint/CDC/FeV/PowerIntent checks.
Contribute to the SoC level integration, and participate in synthesis, timing/power closure, and silicon bring-up.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Define the CPU block level design document (e.g., interface protocol, block diagrams, transaction level flow, control registers, pipelines, etc.).
Perform RTL development process (e.g., coding and debug in Verilog, SystemVerilog, or VHDL), function/performance simulation debug, and Lint/CDC/FeV/PowerIntent checks.
Contribute to the SoC level integration, and participate in synthesis, timing/power closure, and silicon bring-up.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience in full VLSI design cycle.
Experience in RTL implementation of low power designs.
Experience in VLSI development with Verilog, SystemVerilog, System Verilog Assertions (SVA), or VHDL, and with design verification, synthesis, timing/power analysis, and DFT.
Preferred qualifications:
Experience in four or more SoC cycles.
Knowledge of modern high-performance CPU architecture and micro-architecture.
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience in full VLSI design cycle.
Experience in RTL implementation of low power designs.
Experience in VLSI development with Verilog, SystemVerilog, System Verilog Assertions (SVA), or VHDL, and with design verification, synthesis, timing/power analysis, and DFT.
Preferred qualifications:
Experience in four or more SoC cycles.
Knowledge of modern high-performance CPU architecture and micro-architecture.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
