Imagine what you could do here. At Apple, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. In this visible role, you will be responsible for defining DV methodologies, test-bench infrastructure and project execution for the next generation MSP (Memory Signal Processing) IPs to enable state of the art storage solutions for Apple products line. The position is relevant to all Apple sites: Herzliya, Haifa and Jerusalem
Description
You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus in UVM. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance. You will work closely with the design, architecture, software, system and validation teams from the early stages of IP definition, to ensure timely delivery of quality designs. Involvement with Post Silicon Validation and other verification teams.
Minimum Qualifications
5+ years of experience in SoC or IP verification
Advanced knowledge of SoC architecture/design, in-depth knowledge of verification flows and broad system view
Expected to have a deep understanding and shown experience in advanced verification processes, including coverage driven and formal methods
Extensive experience with SystemVerilog and UVM
Experience with verification infrastructure development
Scripting and programming experience using several of the following: Perl, Python, Verilog, SystemVerilog, C, C++, and TCL
Preferred Qualifications
Knowledge of storage IPs and control oriented design - an advantage
Knowledge of formal, hardware acceleration - an advantage
BS.c/ MS.c in EE/CE
Submit Resume
משרות נוספות מומלצות עבורך
-
Experienced Verification & Logic Designer
-
שדרות
- הגשה ישירה
Elbit Systems
-
-
Emulation Verification Engineer
-
הרצליה
Apple
-
-
Verification Engineer
-
גבעתיים
Xsight Labs LTD
-
-
CPU Design Verification Engineer, PhD University Graduate, 2025 Start
-
חיפה
Google
-
-
Verification Engineer
-
חולון
- הגשה ישירה
Elbit Systems
-
-
CPU Verification Engineer
-
תל אביב - יפו
Apple
-
רוצה לראות עוד משרות מתאימות? Jobify מנתחת את הניסיון התעסוקתי שלך ומציגה לך משרות עדכניות - בחינם!