עדיין מחפשים עבודה במנועי חיפוש? הגיע הזמן להשתדרג!
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you will be doing:
Join Tel Aviv group, working on designing and verifying the new generation of high-speed ports.
Design and verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area, and performance
Daily work might involve any or all aspects of chip development: Verification, Design, and Micro-Architecture.
Work closely with Firmware and other groups around the globe.
What you will be doing:
Join Tel Aviv group, working on designing and verifying the new generation of high-speed ports.
Design and verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area, and performance
Daily work might involve any or all aspects of chip development: Verification, Design, and Micro-Architecture.
Work closely with Firmware and other groups around the globe.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Communication Engineering/Computer Engineering.
3+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design). Less experienced engineers with high university grades will also be considered.
High Level of English.
Ways to stand out from the crowd:
Background in Specman.
Knowledge in Verilog.
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Communication Engineering/Computer Engineering.
3+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design). Less experienced engineers with high university grades will also be considered.
High Level of English.
Ways to stand out from the crowd:
Background in Specman.
Knowledge in Verilog.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
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