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במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
מלאה
In this role, you will define, lead and track our products operation covering NPI, ATE test and characterization, system level testing, Q&R, yield improvements processes. You will be managing a team that is responsible for developing test programs, hardware for wafer probe, Automated Testing Equipment (ATE) for characterization, and production testing of very high performance networking and machine learning ICs. You'll also be responsible for developing test plans and supporting the full life cycle of the product from design to volume manufacturing.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Be responsible for Silicon product engineering activities including NPI, system level testing, Q&R, and HVM (including yields analysis and RMA/FA).
Lead a team to develop silicon product test hardware and software, silicon data analytics, and system level testing.
Build up HVM test engineering supply chain with the necessary tracking, managing, and yield/quality correlation analysis to optimize cost.
Develop a robust NPI team across regions to facilitate the execution of multiple products. Prioritize the creation of a systematic NPI test program strategy that includes clear definition, efficient execution, and ongoing refinement.
Lead and drive test planning and test execution with design, DV and DFT teams, and translate concepts to product testing requirements.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Be responsible for Silicon product engineering activities including NPI, system level testing, Q&R, and HVM (including yields analysis and RMA/FA).
Lead a team to develop silicon product test hardware and software, silicon data analytics, and system level testing.
Build up HVM test engineering supply chain with the necessary tracking, managing, and yield/quality correlation analysis to optimize cost.
Develop a robust NPI team across regions to facilitate the execution of multiple products. Prioritize the creation of a systematic NPI test program strategy that includes clear definition, efficient execution, and ongoing refinement.
Lead and drive test planning and test execution with design, DV and DFT teams, and translate concepts to product testing requirements.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in IC product development or test engineering, and manufacturing; including characterization, qualification, bring-up, yield improvement, and debug.
6 years of experience in people management, developing employees.
Experince working with vendors.
Preferred qualifications:
Background in wafer probe card, ATE hardware, and experience in managing suppliers on execution of test hardware development and bring-up.
Programming/scripting (C and C++, Python, or Perl) skills, and knowledge of probability and statistical fundamentals for data analysis and process control design.
Background on test engineering, DFT, test hardware, and test program development (Teradyne UltraFlex, Advantest 93k platforms).
Background on building test program and HVM floor management.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in IC product development or test engineering, and manufacturing; including characterization, qualification, bring-up, yield improvement, and debug.
6 years of experience in people management, developing employees.
Experince working with vendors.
Preferred qualifications:
Background in wafer probe card, ATE hardware, and experience in managing suppliers on execution of test hardware development and bring-up.
Programming/scripting (C and C++, Python, or Perl) skills, and knowledge of probability and statistical fundamentals for data analysis and process control design.
Background on test engineering, DFT, test hardware, and test program development (Teradyne UltraFlex, Advantest 93k platforms).
Background on building test program and HVM floor management.
This position is open to all candidates.
במקום לעבור לבד על אלפי מודעות, Jobify מנתחת את קורות החיים שלך ומציגה לך רק משרות שבאמת מתאימות לך.
מעל 80,000 משרות • 4,000 חדשות ביום
חינם. בלי פרסומות. בלי אותיות קטנות.
