Defect Reduction Engineer

Job Description

Conducts yield and failure analysis to identify root causes and propose solutions to issues that improve yields and overall reliability.

Provides analysis of end of line test data, parametric, and process data involving electrical, advanced analytical techniques and/or visual characterization of failing wafers and devices, utilizing statistical tools to extract data and perform parabolic and correlation calculations.

Develops advanced characterization and analysis techniques and solutions to improve analysis quality and efficiency.

Performs electrical failure analysis (EFA) to segment complex issues spanning across process, test marginalities and overall product operation to improve wafer level yields, for products in development as well as high volume manufacturing phase.

Uses data analysis, test debug and problem solving to identify root cause yield limiters to drive improvements with current products and improve manufacturability of future products.

Supports in process and defect characterization, and in developing innovative techniques/approaches to accelerate failure identification and root cause mechanism understanding.

Qualifications

Minimum Qualifications:

Bachelor's degree in science and engineering major.

3+ years' experience in advanced node semiconductor industry in Defect engineering.

3+ years' experience in identifying defect mechanism, assessing its yield impact and improving D0.

3+ years' experience in FinFET technology development or high-volume manufacturing with hands-on knowledge of FinFET technology process flow to analyze systematic defect sources and set mitigation actions.

3+ years' experience in developing improvement projects at module level and collaborate with module teams to improve process for reduced defectivity and improved yield.

3+ years' experience in layout-sensitive defect weak points and how OPC works.

3+ years' experience with module tool impacts to defects, inline parametrics and yield through PM life while understanding upstream and downstream impacts to other tools

Preferred Qualifications:

Advanced degree (Master's or Ph.D.) in Physics or Materials Science major.

Experience in project/program management and/or TFT lead.

Demonstrated interpersonal skills including influencing, engaging, and motivating.

Experience in serving external Foundry customers through technical interactions.

Experience in GAA (Gate-All-Around) technology architecture and understanding on GAA-specific defect issues.

Basic understanding and collaboration experience with module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.

#foundry

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

IL, Qiryat Gat

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

JobType

Hybrid