Senior Power Electronics Engineer

Own the entire hardware lifecycle of our next-generation power conversion systems — from topology selection and mathematical modeling through to physical board design, control loop implementation, and laboratory validation.

* Architectural Planning: Define and evaluate power conversion topologies using behavioral and mathematical modeling tools (e.g., SIMPLIS, PLECS, or MATLAB).
* System Design & Implementation: Design, implement, and verify power stages and control systems to meet strict product specifications, including schematic entry, magnetics design, and PCB layout supervision.
* Simulation & Verification: Perform switching-level and average-model simulations to verify power stages, gate drivers, and sensing circuitry.
* Hardware Validation: Validate physical hardware through rigorous laboratory testing, including efficiency profiling, thermal characterization, and loop stability analysis (Bode plots).
דרישות התפקיד:
* Education: B.Sc. or M.Sc. in Electrical Engineering from a recognized university.
* Experience: 10+ years of hands-on experience in power electronics design, switched-mode power supplies (SMPS), and hardware-in-the-loop (HIL) testing techniques.
* Technical Core: Deep expertise with Buck, Boost, and LLC converters; isolated DC-DC topologies; gate drivers and PFC; analog control loops.
* Lab Skills: Advanced laboratory proficiency using high-voltage probes, electronic loads, and frequency response analyzers (FRAs).

Preferred Qualifications
* Magnetics Design: Strong knowledge of custom transformer and inductor design for high-frequency applications.
* Digital Control: Familiarity with digital control implementation using MCUs or DSPs (e.g., TI C2000, STM32).
* Compliance & EMI/EMC: Knowledge of EMI/EMC mitigation techniques and board-level filter design to meet CISPR and FCC standards.
* Thermal Management: Experience with thermal simulation tools (e.g., Ansys Icepak, FloTHERM) and hardware cooling strategies.
* Semiconductor & Layout Physics: Solid understanding of power MOSFET/LDMOS device physics and high-current PCB layout constraints.