Engineering Program Manager

DESCRIPTION The Role

As an Engineering Program Manager at Xsight Labs, you will be at the center of the development and execution of our next-generation semiconductor products.

You will work closely with Architecture, VLSI Design, Verification, Backend, DFT, Package, Software, System, Validation, Operations, Product Management, and external partners to establish execution plans, drive technical and program decisions, manage dependencies, and deliver against aggressive product milestones.

This is not simply a schedule-management position. The Program Manager is expected to develop a strong understanding of the product and its technical dependencies, identify risks before they become schedule problems, challenge assumptions, and drive teams toward closure.

What You'll Do

• Own end-to-end program execution from initial product definition and planning through architecture, RTL development, verification, physical design, tapeout, silicon bring-up, validation, and production readiness.
• Build and maintain the integrated program plan , including major milestones, dependencies, deliverables, critical paths, resource assumptions, and execution risks.
• Drive cross-functional execution across Architecture, RTL, Verification, Backend/Physical Design, DFT, Package, Software, System, Validation, Operations, and Product teams.
• Drive closure of technical dependencies and open issues. Work with engineering leads to establish clear owners, priorities, decision dates, and recovery plans.
• Identify program and technical risks early , quantify their potential schedule or product impact, and drive mitigation plans with the relevant engineering teams.
• Manage critical silicon milestones , including architecture/specification freezes, IP readiness, RTL freezes, design reviews, tapeout readiness, manufacturing handoffs, first-silicon bring-up, validation, and production qualification.
• Coordinate external dependencies with IP suppliers, foundry, packaging, manufacturing, board/system partners, and other technology vendors where required.
• Establish execution discipline and operating cadence through effective program reviews, milestone tracking, dependency management, issue escalation, and decision tracking.
• Communicate program status at multiple levels , from detailed engineering discussions to concise management and executive-level reporting.
• Continuously improve development processes , identifying opportunities to make planning, execution, communication, and decision-making more efficient.
  
  

• B.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 5+ years of relevant experience in engineering program management at semiconductor company.
• Previous experience with ASIC/SoC development from concept through production-Must
• Experience managing complex, multidisciplinary development programs involving multiple engineering organizations.
• Strong understanding of semiconductor/ASIC or complex hardware development processes.
• Demonstrated ability to build and manage schedules, milestones, dependencies, critical paths, risks, and mitigation plans.
• Ability to understand technical discussions sufficiently to identify dependencies, expose gaps, and drive engineering decisions.
• Excellent organizational, communication, and leadership skills.
• Strong ownership mentality with the ability to operate effectively in a fast-moving environment with changing priorities.
• Proven ability to influence and drive results across teams without relying on direct organizational authority.
  
  

• Experience in one or more of the following areas: RTL/design, verification, physical design/backend, DFT, high-speed interfaces, package, board development, silicon validation, or system engineering.
• Experience managing projects involving advanced process nodes and complex SoC integration.
• Familiarity with semiconductor development milestones such as specification freeze, RTL freeze, netlist release, tapeout, silicon arrival, bring-up, qualification, and mass-production readiness.
• Experience working with foundries, IP vendors, OSAT/package suppliers, ODMs, or other external engineering partners.
• Experience coordinating geographically distributed engineering teams.
• Experience in networking, data-center silicon, Ethernet switching, DPU, PCIe, DDR, or high-speed SerDes technologies is an advantage.