Senior Physical Layer Firmware Architecture Engineer

How would you help shape the high-speed connections powering the next generation of AI and computing? Join NVIDIA’s Networking Architecture team and help us define the physical layer capabilities of our next-generation networking ASICs! We work across hardware, firmware, and software to turn complex requirements into reliable networking solutions. We’re looking for an engineer who enjoys solving challenging technical problems, sharing ideas, and bringing teams together to move features from concept to implementation.

What You’ll Be Doing

You’ll help shape our PHY firmware and system architecture, defining the hardware capabilities and interfaces needed to support it. Together, we’ll translate customer needs, product requirements, and physical layer standards into detailed technical specifications.

• Lead features through architecture, implementation, and validation, working with teams to resolve technical challenges.
• Define PHY configuration, initialization, link management, monitoring, and diagnostic capabilities.
• Collaborate with ASIC design, system, firmware, driver, and product teams to review designs and validation plans, evaluate tradeoffs, and drive key decisions.
• Enable interoperability across devices and protocol generations, contribute to next-generation PHY capabilities, and serve as a technical focal point for cross-team integration.
  
  

• A bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience, and 5+ years of relevant experience in PHY communication, firmware system engineering, embedded systems, or architecture definition.
• A solid understanding of high-speed communication systems and how PHY hardware and firmware work together.
• A background in embedded software or firmware development, including translating system requirements into technical specifications, alongside networking experience and familiarity with Ethernet/IEEE 802.3 or InfiniBand.
• The ability to lead technical efforts across engineering teams, supported by strong analytical skills, attention to detail, and effective written and verbal communication.
  
  

• We’d also welcome a master’s degree or equivalent experience, experience defining PHY architecture or firmware features for networking ASICs, or knowledge of SerDes, link training, auto-negotiation, equalization, FEC, or signal integrity.
• Hands-on experience debugging hardware and firmware interactions, resolving interoperability issues, contributing to communication standards, or evaluating emerging protocols would help you contribute to our work. We also value experience guiding cross-team decisions and mentoring engineers.