Senior Process Engineer

DustPhotonics, now part of Credo, develops cutting-edge Silicon Photonics technology for high-performance data center connectivity.

We are seeking a Senior Process Engineer to lead the development and commercialization of advanced packaging processes for silicon photonics devices targeting the telecommunications and datacom markets.

This role will focus on working with high-volume OSATs to define, validate, and qualify high-performance, reliable, and manufacturable packaging solutions for silicon photonics chips, including wafer-level packaging, wafer bonding, copper pillar technologies, flip-chip assembly, die attach, optical coupling, and high-speed electrical interconnects.

The ideal candidate has strong hands-on experience in semiconductor packaging and process development, with a proven track record in the development and transfer to high-volume manufacturing of packaging solutions for high-I/O, high-speed electrical, or electro-optical silicon devices.

Key Responsibilities

· Lead the process development of advanced packaging solutions for high-speed, high-I/O-count silicon photonics devices.

· Develop and optimize processes related to wafer-level packaging (WLP), copper pillars, wafer bonding, optical coupling, and flip-chip assembly.

· Work closely with silicon photonics, IC design, optical, mechanical, electrical, and reliability teams to define package requirements, including signal integrity, thermal performance, mechanical performance, and reliability, and translate them into manufacturable, high-yield processes.

· Work with external OSATs, wafer fabs, packaging houses, and equipment and material suppliers to develop, validate, qualify, and scale packaging processes.

· Drive continuous improvement of packaging yield, quality, reliability, cost, and manufacturing capability.

· Support the transfer of packaging processes from R&D through qualification and high-volume manufacturing.

Required Qualifications & Experience

· B.Sc. or M.Sc. in Materials Engineering, Mechanical Engineering, Electrical Engineering, Chemical Engineering, Physics, or a related field.

· 7+ years of hands-on experience in semiconductor packaging and process development.

· Proven experience with wafer-level packaging and/or advanced semiconductor packaging.

· Hands-on experience with flip-chip, die attach, copper pillar, and advanced interconnect technologies.

· Hands-on experience with wafer bonding technologies and processes.

· Experience with optical alignment and coupling processes for electro-optical devices is an advantage.

· Strong understanding of the interaction between electrical, optical, thermal, mechanical, and materials aspects of advanced packaging.

· Experience with process characterization, DOE, SPC, process capability, and statistical analysis.

· Experience taking processes from PoC through qualification and manufacturing ramp.

· Experience working with external manufacturing partners, OSATs, fabs, and suppliers.

· Experience with high-speed electrical signaling and package-level signal integrity is an advantage.

· Strong hands-on problem-solving skills and the ability to drive complex process development activities from concept through manufacturing.