CPU Core Architect

A leading global technology enterprise operating an advanced Israeli Innovation and R&D Hub dedicated to next-generation Cybersecurity, hardware platforms, and Applied AI.

Employing hundreds of professionals locally, the center acts as a spearhead engineering arm developing breakthrough protection mechanisms, specialized architectures, and AI-driven defense technologies for critical enterprise infrastructure worldwide.

The organization pairs the deep resources and financial stability of a major global corporation with cutting-edge research, collaborative academic partnerships, and a strong culture of work-life balance.

Located in the Sharon region, operating on a hybrid model with two days working from home.

Role Description-

• Serving as a Principal / Senior CPU Architect, taking key technical ownership over the architectural definition and micro-architecture of a next-generation proprietary CPU core for an advanced ASIC.
• Defining CPU micro-architectural specifications, pipelines, execution units, and memory hierarchy to achieve optimal balance across Performance, Power Efficiency (PPA), Bandwidth, and Scalability.
• Leading performance modeling, bottleneck analysis, and architectural trade-off evaluations using high-level simulators and benchmark suites.
• Collaborating closely with multidisciplinary engineering squads spanning ASIC Design, Verification, Physical Design, System Architecture, and Low-Level Software / Compiler teams.
• Contributing to the foundational processor roadmap, translating emerging AI and security workload characteristics into cutting-edge silicon architecture.

Requirements-

• 6 years of dedicated professional experience in CPU Architecture and Micro-Architecture – Mandatory
• Direct, proven engineering background from tier-1 CPU / processor design companies – Mandatory
• Deep technical expertise in CPU Micro-Architecture (pipeline design, branch prediction, out-of-order execution, caches, and memory sub-systems) – Mandatory
• Strong background in PPA optimization (Performance, Power, and Area) and architectural trade-off analysis – Mandatory
• Proven track record driving architectural concepts from definition through micro-architectural specification in advanced silicon nodes – Mandatory
• Excellent technical leadership, collaborative mindset, and fluent communication skills in English (written and verbal) – Mandatory