Memory IP Applications Engineering, Sr Staff Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Who You Are:

• Excellent communicator, able to engage effectively with customers and cross-functional teams.
• Organized and detail-oriented, with a track record of meeting tight schedules and managing multiple projects simultaneously.
• Resourceful problem-solver who adapts to new challenges and technologies with enthusiasm.
• Customer-focused, proactive, and collaborative in approach.
• Committed to continuous learning and professional growth.
  
  

• Providing technical guidance and hands-on support to customers integrating Synopsys Memory Sub System IPs into their ASIC SoC/systems.
• and Conducting detailed integration reviews at key customer milestones troubleshooting complex integration challenges throughout the SoC design flow.
• Collaborating with customers to resolve technical issues related to RTL simulation, synthesis, floorplanning, timing closure, and silicon/system bring-up.
• Supporting silicon bring-up and characterization in system environments, ensuring successful deployment of Synopsys IP in customer products.
• Documenting best practices, developing application notes, and delivering training to enable customer success with Synopsys solutions.
• Participating in cross-functional teams to relay customer feedback, contribute to product improvements, and stay current with the latest interface protocols and industry standards.
• Occasionally traveling to customer sites for on-site support, integration reviews, and system bring-up activities.
  
  

• Highly Motivated & Customer-Focused: Engineering professional with a genuine passion for enabling next-generation semiconductor solutions.
• Thrives in Dynamic Environments: Energized by collaborative workspaces and complex technical troubleshooting.
• Interface IP & SoC Specialist: Hands-on experience integrating cutting-edge interface IPs (such as DDR/LPDDR) into advanced silicon products, backed by a thorough understanding of ASIC and SoC design flows.
• Strong Communicator: Exceptional technical acumen paired with the ability to translate intricate engineering concepts to diverse audiences, from internal teams to external customers.
• Adaptable & Continuous Learner: Comfortable working both independently and as part of a broader team while demonstrating resourcefulness and curiosity.
• Results-Driven Under Pressure: Excels at managing multiple priorities and delivering high-quality results within tight deadlines.
• Rigor-Oriented: Approaches new protocols and technologies with an analytical, organized mindset to keep complex projects on track.
• Relationship Builder: Uses a customer-centric approach to establish trusted relationships with industry leaders.
• Impact-Oriented: Enthusiastic about contributing to the success of Synopsys' customers by guiding them through the integration and validation of our world-class Interface IP portfolio.
  
  

• Masters with 10+yrs of Industry experience or equivalent
• At least 10+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered).
• Solid understanding of ASIC design flows, including simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
• Hands-on expertise in integration and validation of High Speed IPs for Memory sub system
• Proficient in RTL and gate-level simulation debugging, with familiarity in front-end tools like Design Compiler, Fusion Compiler, and PrimeTime.
• Experience with silicon bring-up and system-level characterization in lab environments.
• Domain knowledge of memory sun system, DDR & LPDDR protocols implementation flows.