Physical Design STA Engineer

Job Requisition ID

JR2023082

Job Category

Engineering

Time Type

Full time

NVIDIA is looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What You'll Be Doing

• You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.
• Work closely with block owners, full Chip STA engineers to assure high quality and timely convergence.
• Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.
• Additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects.
  
  

• B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).
• 2+ years of fulltime relevant experience in the areas listed below.
• Proven experience and strong knowledge in key technical domains, including: Physical Design, STA (Static Timing Analysis) and Timing closure methodologies.
• Familiarity with industry-standard tools like PrimeTime (STA) and PrimePower (Power Estimation).
• Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
• Strong sense of ownership, self-learning skills, and ability to work both independently and collaboratively with internal and global teams
  
  

• Experience in Signoff domains: STA (PrimeTime), Power Estimation (PrimePower), Power Integrity (RedHawk), Formal eq. (Formality), Backend CAD (Computer-Aided Design),
• Knowledge in Tcl/Perl/Python
• Versatile
• Great teammate