DFT Engineer

Join Orbit Communication Systems as a DFT Practical Engineer, where you will lead the design for testability (DFT) efforts to ensure optimal manufacturing and quality assurance processes for complex electronic systems.

Responsibilities

• implement DFT methodologies to enhance product testability and manufacturability.
• Collaborate with design teams to integrate DFT solutions into the design flow.
• Perform scan insertion, boundary scan, and other DFT techniques to improve test coverage.
• Analyze and resolve DFT-related issues during the design and production phases.
• Lead test pattern generation and validation processes to ensure quality and efficiency.
• Provide technical guidance and mentorship to junior engineers in DFT practices.
  
  

• Review and analyze schematics and PCB layouts during the early development stages.
• Ensure compliance with DFT guidelines and best practices.
• Provide recommendations to improve board testability and manufacturing readiness.
  
  

• Lead and perform comprehensive test coverage analysis using TestWay software or equivalent tools.
• Define test point requirements and identify coverage gaps.
• Provide actionable recommendations to hardware development teams.
  
  

• Define the optimal testing methodology for electronic assemblies (PCBAs) and systems.
• Establish and maintain test strategies integrating:
• In-Circuit Test (ICT)
• Flying Probe Testing
• Functional Testing
• Boundary Scan (JTAG)
  
  

• Develop, configure, and execute JTAG/Boundary Scan tests at both component and board levels.
• Create and maintain test programs and integrate them into production and validation environments.
  
  

• Define requirements for Automated Test Equipment (ATE) and functional test stations.
• Support the development, deployment, and maintenance of test systems in accordance with the defined DFT strategy.
  
  

• Minimum of 5 years of experience in DFT engineering for complex IC designs.
• Proficiency in using DFT tools such as Mentor Graphics Tessent, Synopsys DFTMAX, or Cadence Modus.
• Experience with scan, BIST, and boundary scan methodologies.
• Solid understanding of digital design, VLSI design flow, and verification processes.
• Strong problem-solving skills and attention to detail.
• Excellent communication skills and ability to work collaboratively in a team environment.