Principal ASIC Chip Design Engineer

We are looking for a highly experienced Principal ASIC Engineer with a strong background in ASIC design to join our Chip Design Methodologies team based in Tel Aviv and Yokneam. This team is responsible for establishing ASIC design methodologies, developing shared code, providing design guidance, and driving the adoption of new technologies. It plays a key role in ensuring chip design teams operate efficiently and adhere to best practices.

As a Principal Engineer, you will serve as a technical leader and trusted authority, setting the technical direction for design methodologies across the organization and driving cross-team initiatives that shape how our chips are built. This role offers an exciting opportunity to think innovatively and make a significant, lasting impact within a dynamic, technology-focused organization.

What You'll Be Doing

• Define the technical vision and drive ground-breaking methodologies, micro-architecture and innovations to create a flawless chip design development experience
• Lead the evaluation, development, and assimilation of AI-based tools and flows, championing their adoption across design teams
• Collaborate with and influence chip design stakeholders and peers across the teams to understand existing problems and architect the best solutions and methodologies
• Act as a key technical interface with EDA vendors to evaluate cutting-edge tools/technology and lead their integration into our development process
• Mentor engineers, develop training sessions, and guide designers on best design practices
• Architect and develop shared design code and solutions to be widely adopted by the chip design teams
• Drive cross-functional, organization-wide initiatives and align technical roadmaps across multiple teams
  
  

• BSc. degree in Electrical Engineering
• 15+ years of hands-on pre-silicon design experience
• Proven track record of technical leadership and driving cross-team initiatives to completion
• Strong interpersonal skills, a passion for innovation, and a demonstrated ability to mentor and influence senior engineers
• Experience with AI-based development is an advantage
  
  

• Broad system-level understanding of chip design development and flows
• Ability to influence technical direction across an organization
• Passion for innovation, quality, efficiency, and flow automation
• CDC, Power saving technics (clock gating, power gating, etc.)