Senior Digital Hardware Design Engineer

D-Fend Solutions values its employees as our greatest asset. Our professionals and subject matter experts, including personnel from elite military technology units, provide the best possible solutions to our leading customers around the world. We are proud of our impressive presence across different environments and industries, as well as the results we have helped our customers achieve in contending with their counter-drone challenges.

We seek candidates who thrive in a fast-moving, innovative, and collaborative culture. It also helps if you enjoy having fun—our 'D-Fenders' are a light-hearted bunch who have stashed rubber ducks all around our headquarters! If you want to define the computational hardware foundation for the world’s leading cyber-takeover counter-drone provider, join us in helping to make the world a safer place.

Overview:

D-Fend Solutions is seeking a talented, high-speed board design expert to own the detailed implementation and industrialization of our next-generation Counter-UAS (C-UAS) processing units. As we scale to a complex, multi-product ecosystem featuring deep multi-sensor fusion, you will actively participate in shaping digital hardware architectures while leading the hands-on engineering from schematic design to mass production. This position demands deep expertise in complex, multi-layer carrier board design specifically utilizing Intel processors and COM Express (COMe) architectures, as well as robust simulation and production methodologies.

Key Responsibilities

• Hardware Design Execution: Own the full lifecycle of complex digital hardware boards from schematic capture, component selection, and power distribution network (PDN) design through to high-yield mass production.
• Architecture Collaboration: Actively participate in defining the digital hardware architecture, collaborating closely on modular computing strategies, baseboard optimizations, and multi-sensor integration.
• Intel & COM Express Integration: Lead the detailed layout and integration of high-performance Intel processors and COM Express (COMe) form factors, managing complex, dense high-speed buses (PCIe Gen 4/5, DDR4/DDR5, 10GbE, USB4).
• Simulation & Signal Integrity: Execute rigorous pre- and post-layout Signal Integrity and Power Integrity (SI/PI) simulations to guarantee precise timing margins, stable power delivery, and low-noise performance on dense, fine-pitch BGA footprints.
• Production Scale-Up & DFx: Champion Design for Excellence (DFM, DFA, DFT) methodologies, boundary-scan testability, and detailed verification hardware documentation to ensure flawless transfer to manufacturing lines and eliminate field escalations.
• Cross-Discipline Collaboration: Work closely with subcontractors (layout) and other R&D disciplines—including FPGA, Embedded SW, Cyber, and Mechanical engineering—to resolve interdisciplinary space, thermal, and noise constraints.

Key Qualifications

Required

• B.Sc. in Electrical Engineering, Computer Engineering, or equivalent experience.
• 8+ years of proven experience as a board designer executing complex high-speed digital hardware projects through complete manufacturing cycles.
• Deep, hands-on experience designing with Intel processors and implementing COM Express (COMe) architectures, alongside modern GPUs, FPGAs, or SoCs.
• Proven track record routing and debugging a wide variety of hardware interfaces (Ethernet, PCIe, USB, MIPI, high-speed memory architectures).
• Expertise leading multi-layer PCB design involving fine-pitch BGAs, high-density interconnects (HDI), via-in-pad structures, and strict layout subcontractor management.
• Strong foundation in SI/PI fundamentals, simulation workflows, and hands-on laboratory debugging using high-bandwidth scopes and logic/protocol analyzers.
• Personal Attributes: Exceptional independent project execution skills, strong problem-solving mindset, and excellent interpersonal skills to lead multi-disciplinary alignments.

Preferred

• High proficiency with Altium Designer and advanced simulation toolsets (HyperLynx, Ansys, or equivalent).
• Experience managing configuration and manufacturing parameters within Arena PLM.
• Familiarity with regulatory frameworks and test standards (FCC/CE/MIC compliance, EMI/EMC shielding validation).
• A foundational understanding of RF fundamentals to assist with mixed-signal isolation planning.