Physical Design Engineer

An established, global semiconductor enterprise that designs, engineers, and manufactures advanced electronic components and silicon architectures powering automotive, industrial automation, communications, cybersecurity, IoT, and smart-device ecosystems worldwide.

Located in a northern tech cluster and operating on an on-site, office-based work model

Position Overview

• Physical Design Engineering Manager taking full managerial and technical ownership over the Physical Design execution of highly complex, multi-core SoC architectures.
• Leading and mentoring an elite team of silicon engineers while seamlessly synchronizing workflows across global R&D sites and cross-functional backend engineering divisions to guarantee tape-out timelines.
• Driving execution strategies across floorplanning, placement, routing, and sign-off, ensuring all sub-micron layouts tightly achieve performance, power, and area (PPA) constraints for high-volume manufacturing.

Requirements

• B.Sc. in Electrical Engineering from a leading academic institution - Mandatory (M.Sc. - Advantage)
• 15+ years of proven professional experience within the semiconductor layout and chip design industry - Mandatory
• Deep, expert-level technical mastery in Physical Design (PD) implementation for complex SoC architectures, with extensive familiarity covering leading EDA toolchains and layout methodologies - Mandatory
• Proven experience working in tight alignment with RTL, Design Verification (DV), MSIP, and CAD teams across distributed global environments - Mandatory
• Advanced knowledge of Ultra-Low Power (ULP) design techniques, power-gating architectures, and advanced timing closure protocols - Mandatory
• Exceptional cross-cultural communication, leadership, and matrix coordination capabilities with a track record of driving complex engineering milestones independently - Mandatory