Director of Logic Design & Verification

One of our clients, a growing deep-tech company based in Tel Aviv, is looking for a Director of Logic Design & Verification to join its R&D leadership team.

Reporting directly to the VP R&D, this role will lead a group of approximately 40 engineers through 5 Team Leaders and will be responsible for driving the development and delivery of complex ASIC and SoC products

.
This is a senior leadership position combining organizational leadership, technical excellence, and execution ownership, with significant influence on the company's technology roadmap and engineering cultur

e.
Responsibilit

• iesLead and manage an organization of approximately 40 engineers through 5 Team Leade
• rs.Drive end-to-end execution of complex ASIC and SoC development progra
• ms.Own Logic Design, RTL Development, Integration, and Verification activiti
• es.Establish and continuously improve design and verification methodologies, processes, and engineering best practic
• es.Partner closely with Architecture, Physical Design, DFT, System Engineering, Firmware, Software, and Program Management tea
• ms.Ensure delivery of high-quality products while meeting performance, power, area, quality, and schedule objectiv
• es.Lead technical reviews, risk assessments, and engineering decision-making process
• es.Mentor managers and senior engineers while building a strong and scalable engineering organizati
• on.Contribute to long-term technology planning and organizational strategy as a member of the R&D leadership te

am.Requireme

• ntsB.Sc. or higher degree in Electrical Engineering, Computer Engineering, or a related discipli
• ne.15+ years of experience in ASIC/SoC developme
• nt.Proven experience leading large engineering organizatio
• ns.Experience managing managers and multiple engineering tea
• ms.Strong background in Logic Design, RTL Design, and Design Verificati
• on.Demonstrated success delivering complex silicon products from architecture through tape-out and producti
• on.Broad understanding of the full chip development lifecycle, including Verification, Integration, DFT, Physical Design, Timing Closure, and Post-Silicon activiti
• es.Strong leadership, communication, and stakeholder management skil
• ls.Experience working in multidisciplinary and fast-paced development environmen

ts.
Position Det

• ailsReporting to: VP R&a
• mp;DTeam size: Approximately 40 engin
• eersDirect reports: 5 Team Lea
• dersCompany size: Approximately 150 emplo
• yeesLocation: Tel
• AvivHybrid work model: 3 days in the office, 2 days from