Senior DFT Design Engineer

Job Requisition ID

JR2011660

Job Category

Engineering

Time Type

Full time

NVIDIA is looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team at NVIDIA, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What You'll Be Doing

• In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
• As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
• Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
  
  

• B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
• 5+ years of practical experience.
• Exposure to rtl implementation and coding.
• Familiarity with verification tools.
• Strong debugging, problem solving and analytical skills.
• Strong communication and social skills are required.
• Ability to work in a geographically diverse team environment.
• Self motivated, independent and target oriented.
  
  

• Prior Design or Verification experience.
• Experience in developing sophisticated design blocks.
• Integration of design elements to large cluster or full-chip.
• Experience in working with back-end on area, power and timing closures.
• Scripting ability.