Senior AI Formal Verification Engineer

NVIDIA’s Formal Verification (FV) team is seeking a visionary AI Verification Engineer to join our elite Networking Chip Design group. Our team is unique: we define the infrastructure and drive the methodologies for proving the correctness of the world’s most advanced AI and networking architectures. We operate at the cutting edge, leveraging a sophisticated ecosystem of proprietary in-house formal tools and industry-leading vendor EDA solutions.

In this role, you will be a key architect in our "AI-for-FV" evolution. You will work in close collaboration with our internal CAD and Design Technology AI teams to enhance our in-house toolset with artificial intelligence. You won't just be using tools; you will be building the "brains" that sit on top of them—utilizing LLMs and Machine Learning to automate intent-to-proof workflows and debug complex chips with unprecedented speed.

What You’ll Be Doing

• In-House Tool Evolution: Partner closely with internal CAD teams to integrate AI capabilities directly into our proprietary FV infrastructure.
• Methodology Architecture: Define and evolve the FV team’s specialized methodologies, moving from manual property writing to AI-automated assertions.
• Next-Gen Orchestration: Develop and integrate AI agents and ML models that interface with our toolchain to automate "intent-to-assertion" workflows and optimize coverage and convergence.
• Intelligent Debugging: Create AI-based debug assistants that analyze formal counter-examples, categorize failures, and autonomously suggest fixes for complex logic problems.
• Collaborative Intelligence: Act as the bridge between the FV team, Design Technology AI, and CAD groups to ensure our AI solutions provide end-to-end efficiency from RTL to A0 tapeout.
• Leadership & Training: Act as the authority on AI integration, training the broader team on how to leverage "human-in-the-loop" AI tools and automated methodologies.
  
  

• Bachelor’s or Master’s Degree in Electrical Engineering, Computer Science, or equivalent experience.
• 7+ years of hands-on pre-silicon verification experience, with a strong foundation in Formal Verification (FV).
• A perspective geared toward automation and experience, defining or refining complex verification infrastructures.
• A desire to redefine traditional "manual" verification workflows using modern software and AI principles.
  
  

• Experience building or deploying AI tools specifically designed for hardware (e.g., LLM-based assertion generation)
• Proven track record of collaborating with CAD or tool-development teams to refine internal design flows.