Design Verification CAD Engineer

Summary

We are looking for a talented and passionate engineer to help develop verification tools and methodologies used across all of Apple.nAs a CAD DV engineer you will leverage strong SW skills and HW verification knowledge to create diverse solutions for DV activities.nYour work will be used globally throughout all verification teams across the organization, and will contribute to development of all Apple Silicon chips.

Description

In this role you will be contributing to development of tools and methodologies and integrating LLM based capabilities in multiple realms related to Design Verification, collaborating with a wide range of stakeholders at Apple.

Minimum Qualifications

BSc/ MSc in Electrical Engineering, Computer Engineering or Computer Sciencen3+ years of experience in the HW industrynStrong software foundation - data structures, algorithms, efficiency, version control (git)nDesign Verification experience, including: familiarity with simulators (such as VCS, Xcelium), coverage, waveform debug, automations on top of vendor toolsnPython, including popular libraries such as Pandas, NumPy, asyncio, FastAPI, PytestnAdapts quickly to new technologies and methodologiesnIndependent, self-directed, and autonomous

Preferred Qualifications

Containerization (e.g. Docker)nCI/CD methodologies (e.g., in GitLab/GitHub)nDeploying on Kubernetes, writing Kubernetes/Kustomize YAMLsnExperience with Frontend/Backend/Full-Stack web developmentnFamiliarity with databases - Relational/Non-relational, CAP TheoremnAsync programming