Senior Analog Design Engineer

Senior Analog Design Engineer – Next-Generation Multi-Gigabit AFE (Sub-Micron Node)

We’re looking for a highly experienced Analog Design Engineer to lead the development of a next-generation, multi-gigabit Analog Front End (AFE) on advanced sub-micron technologies.

This is a key hands-on leadership role, driving architecture definition, circuit innovation, design-flow methodology, and test-chip development for one of the most advanced mixed-signal platforms in the industry.

Key Responsibilities:

• Lead end-to-end mixed-signal design (ADC/DAC/RX/TX/PI) from concept to silicon validation.
• Define and optimize AFE architectures balancing bandwidth, linearity, power, and area.
• Provide technical leadership and mentorship, developing design checklists and best practices.
• Define test-chip architecture to validate sub-blocks and full AFE functionality prior to production.
• Perform simulation, modeling, and post-layout validation using Cadence Virtuoso, SystemVerilog, AMS etc.
• Support silicon bring-up and characterization, ensuring first-pass success.

Qualifications:

• M.Sc. or Ph.D. in EE with 15+ years in high-speed analog/mixed-signal design.
• Proven success with FinFET and deep sub-micron CMOS (16 nm and below).
• Track record in ADC/DAC/PLL/PI/RX/TX design.
• Strong analytical, communication, and cross-disciplinary leadership skills.
• Experience managing off-shore design service teams is a plus