Senior Physical Design Verification Layout Engineer

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What You'll Be Doing

• Responsible for chip floorplan and pins placement
• Running, debugging and approve Physical verification flows across multiple projects
• Perform physical layout planning and optimization
  
  

• B.SC./ M.SC. in Electrical Engineering
• At least 5+ years of hands-on layout design experience
• Strong background of Physical Design Verification methodology LVS/DRC
• Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)
• Great teammate