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About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
We are seeking a Senior Verification Engineer to join our Switching Chip Design group, specifically within the CPU Sub-System team. This team is responsible for developing high-complexity Control and Management (CnM) IPs for next-generation switching SoCs.
You will responsible for the verification of one or more complex units within the CnM system. You will work closely with architects, design engineers, FC verification engineers, and SW teams, develop advanced verification environments, and collaborate with cross-functional teams to ensure robust and high-quality silicon products.
What You Can Expect
- Develop and maintain advanced verification components, environments, and testbenches.
- Build System Verilog UVM verification environments for units in CnM
- Apply coverage-driven verification techniques, constrained random testing, and object-oriented programming.
- Deliver the IPs to higher level verification like Cluster, FC and emulation.
- B.Sc. or M.Sc. in Electrical or Computer Engineering.
- 4+ years of hands-on experience in ASIC/RTL verification.
- Experience in SystemVerilog and UVM methodology.
- Good understanding of coverage-driven verification and OOP principles.
- Excellent problem-solving and self-learning abilities.
- Good interpersonal skills and a teamwork.
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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שאלות ותשובות עבור משרת Senior Verification Engineer
מהנדס אימות בכיר ב-Marvell Technology מצטרף לקבוצת תכנון שבבי מיתוג, בצוות ה-CPU Sub-System. תפקידו כולל אימות יחידות מורכבות במערכת ה-CnM (Control and Management) עבור SoCs מיתוג מהדור הבא, פיתוח סביבות אימות מתקדמות, ועבודה צמודה עם אדריכלים, מהנדסי תכנון וצוותי תוכנה כדי להבטיח מוצרי סיליקון איכותיים ויציבים.
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