Junior ASIC Design Engineer

Mobileye’s EYEQ VLSI team is looking for an ASIC design engineer to be involved in the development of Mobileye’s current and future SoC. Working on the cutting-edge technologies to deliver Mobileye EyeQ SoC family for ADAS and autonomous vehicles.

What will your job look like:

• You will work on developing the next generation of Mobileye SoC for ADAS and AV.
• Be involved in deep understanding of the design at multiple levels: the micro-architecture, features and specification.
• Design and implement new proprietary IPs and system features.
• Integrate third parties and proprietary IPs in a multi-clock domain system on chip.
• Verification, synthesis, static timing analysis, and closure.
• Power and Area Optimizations.
• You will become familiar with design environment, flow, tools, methodologies and optimization methods
• Collaborate with cross-functional teams, including Product Definition, Verification, Software, and Physical design
  
  

• B.Sc. in Electrical Engineering/Computer Engineering.
• Familiar with simulation tools/environments, verification methodologies.
• Experience with a full design cycle – RTL/Verification/Synthesis and timing closure/CDC/ Lint.
• Strong team player, solid interpersonal skills.
• Entrepreneurial can-do attitude, self-motivated, able to work independently.
• Scripting experience using several of the following: Python, Perl, TCL – Advantage.