Senior ASIC Verification Engineer

Power the Future with us!

At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide.

Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond.

With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work.

We are looking for a Senior ASIC Verification engineer with good grasp of the entire verification process – plan, execution and sign-off, excellent analytical skills, technical skills and high motivation to join our team and take part of the success.

What you will be doing:

• Create a thorough verification plan out of IP specification and implement it to completeness.
• Build UVM-compliant IP verification environment from scratch.
• Debug to find root cause of issues.
• Full-chip verification from planning stage to tape-out, including gate-level testing.
• Testing using both System Verilog and C.
• Work in a diverse environment, collaborating with power engineers, communication experts and SW developers.
  
  

• B.Sc. in Electrical Engineering from a leading university.
• Over 5 years of experience in complex ASIC verification.
• Experience in building IP verification environment.
• Experience in UVM methodology.
• Good knowledge in Verilog.
• Experience in embedded C programming – advantage.
• Good communication and interpersonal skills.