Senior Physical Design Engineer

About the job

Join a semiconductor company that develops high-performance computing (HPC) solutions for artificial intelligence (AI) and other computationally intensive workloads.

This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout.

In this role, you will be at the center of the company’s design efforts and will have a significant influence on product architecture.

What You'll Be Doing

• Generate and analyze critical block- and chip-level static timing constraints
• Spec and define full chip floor plan, including pin placement, partitions, and power grid
• Develop and validate high-performance, low-power clock network guidelines
• Perform critical block-level place and route and create designs that meet timing, area, and power constraints
• Review the vendors’ physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations
• Work with vendors on defining physical design methodologies and assist in flow development for chip integration

Requirements

• At least 6 years of physical design experience, leading complex process designs
• In-depth knowledge of process and circuit design
• Knowledge of physical design industry standards and practices, including physically aware synthesis, floor planning, CTS, place and route
• Understanding of scripting languages, such as Perl and Tcl
• Experience developing and implementing power-grid and clock specifications
• Good command of industry-standard physical design and synthesis tools
• Proficiency in power delivery, signal integrity, advanced packaging, power projection, and design for low dynamic power

Job No. 415674

CV to [email protected]