Principle Verification Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is shaping the future of data communication in the AI and cloud era—and we’re looking for talented engineers to join us.

As a Senior Verification Engineer in our Switch IP group, you’ll play a key role in building the world’s most advanced networking silicon for next-generation data centers and AI infrastructure. Our unique collaborative model combines design and verification in one team, empowering you to contribute across the development cycle—from building reference models to working closely with architecture, firmware, and post-silicon teams.

What You Can Expect

• Drive functional verification of complex networking blocks using UVM/SystemVerilog.
• Develop and maintain advanced verification components and testbenches.
• Collaborate with cross-functional teams including architecture, design, firmware, and post-silicon.
• Contribute to methodology and infrastructure improvements in a dynamic and innovative environment.
  
  

• B.Sc. or M.Sc. in Electrical/Computer Engineering
• 7+ years of hands-on experience in ASIC/RTL verification
• Strong background in SystemVerilog and UVM methodology
• Deep understanding of coverage-driven verification, object-oriented programming, and constrained random testing
• Excellent problem-solving skills and self-learning ability