Physical Design Engineer

About the job

Join semiconductor company focused on blockchain and AI acceleration technologies

What You'll Be Doing

• Floor Planning Top to Bottom & Bottom up – Block level. Exploring different floorplan structures to achieve both the best area & ease of convergence.
• Generate high-quality PnR results for one or more digital blocks by applying engineering best practices.
• Optimize designs based on key metrics, including power, area, and performance trade-off analyses.
• Drive sign-off timing convergence for high-performance designs at the block level, including DRC and LVS signoff
• Analyze power integrity (EMIR) results of blocks and apply corrective measures to resolve identified issues.
• Collaborating closely with frontend, verification, architecture, physical design, and analog teams.
• Work closely with EDA (Electronic Design Automation) vendors on the latest tool feature development and qualification.

Requirements

• BSc or MSc in Electrical Engineering or Computer Engineering
• At least 4 years of experience with physical design.
• Expert knowledge of the entire backend design flows from RTL to TO
• Power user of EDA tools from Synopsys (DC/ICC2/FC/PT/STAR-RC/FM), Cadence (EDI/Innovus/Voltus).
• Experience in Clock/Power Distribution, P&R, Timing closure, RC Extraction, and physical verification (DRC/LVS) on advanced technology nodes
• Experience with high-speed serial interfaces such as PCIe, and DDR- an advantage
• Experience with low-power design techniques such as multiple power domains, power switches, level shifting, isolation, and dynamic voltage/frequency scaling using Unified Power Format (UPF)- an advantage

Job No. 415749

CV to [email protected]